X86 Serializing Instructions

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The x86 processors have a large set of flags that represent the state of the processor, and the conditional jump instructions can key off of them in combination. CF - carry flag Set on high-order bit carry or borrow; cleared otherwise PF - parity flag Set if low-order eight bits of result contain an even number of '1' bits; cleared otherwise. To guarantee monotonicity on back-to-back reads, a serializing instruction must be placed between the two RDPMC instructions. The RDPMC instruction can execute in 16-bit addressing mode or virtual-8086 mode; however, the full contents of the ECX register are used to select the counter, and the event count is stored in the full EAX and EDX registers.

In the x86computer architecture, HLT (halt) is an assembly language instruction which halts the central processing unit (CPU) until the next external interrupt is fired.[1] Interrupts are signals sent by hardware devices to the CPU alerting it that an event occurred to which it should react. For example, hardware timers send interrupts to the CPU at regular intervals.

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The HLT instruction is executed by the operating system when there is no immediate work to be done, and the system enters its idle state. In Windows NT, for example, this instruction is run in the 'System Idle Process'. On x86 processors, the opcode of HLT is 0xF4.

History on x86[edit]

All x86 processors from the 8086 onwards had the HLT instruction, but it was not used by MS-DOS prior to 6.0[2] and was not specifically designed to reduce power consumption until the release of the Intel DX4 processor in 1994. MS-DOS 6.0 provided a POWER.EXE that could be installed in CONFIG.SYS and in Microsoft's tests it saved 5%.[3] Some of the first 100 MHz DX chips had a buggy HLT state, prompting the developers of Linux to implement a 'no-hlt' option for use when running on those chips,[4] but this was changed in later chips.

Process[edit]

Almost every modern processor instruction set includes an instruction or sleep mode which halts the processor until more work needs to be done. In interrupt-driven processors, this instruction halts the CPU until an external interrupt is received. On most architectures, executing such an instruction allows the processor to significantly reduce its power usage and heat output, which is why it is commonly used instead of busy waiting for sleeping and idling.

Use in operating systems[edit]

Since issuing the HLT instruction requires ring 0 access, it can only be run by privileged system software such as the kernel. Because of this, it is often best practice in application programming to use the application programming interface (API)[example needed] provided for that purpose by the operating system when no more work can be done. This is referred to as 'yielding' the processor. This allows the operating system's scheduler to decide if other processes are runnable; if not, it will normally issue the HLT instruction to cut power usage.

See also[edit]

References[edit]

  1. ^'Intel 64 and IA-32 Architectures Software Developer's Manual: Instruction Set Reference A-Z'(PDF). Retrieved 2012-03-01.
  2. ^'Why does DOS use 100% CPU under Virtual PC?'. microsoft.com. Retrieved 18 November 2018.
  3. ^'POWER.EXE and Advanced Power Management (APM) Support'. Archived from the original on 2014-09-27. Retrieved 2015-09-27.
  4. ^'The Linux BootPrompt-HowTo'. www.faqs.org. Retrieved 18 November 2018.
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